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The EM42BM1684RTC is high speed Synchronous
graphic RAM fabricated with ultra high performance CMOS process
containing 536,870,912 bits which organized as 8Meg words x 4
banks by 16 bits. The 512Mb DDR SDRAM uses double data rate
architecture to accomplish high-speed operation. The data path
internally pre-fetches multiple bits and It transfers the data
for both rising and falling edges of the system clock. It means
the doubled data bandwidth can be achieved at the I/O pins.
Available packages: TSOPII 66pin 400mil
.
Feature
Internal Double-data-rate architecture with
2 accesses per clock cycle
VDD/VDDQ= 2.5V ± 0.2V
2.5V SSTL-2 compatible I/O
Burst length(B/L) of 2, 4, 8
2.5, 3 clock read latency
Bi-directional, intermittent data strobe (DQS)
All inputs except data and DM are sampled
at the positive edge of the system clock
Data Mask (DM) for write data Sequential
& Interleaved Burst type available